DRAM, SDR, 256 Mbit, 16M x 16bit, 143MHz, TSOP-II, 54 Pins - IS42S16160G-7TLI

The IS42S16160G-7TLI is a 256Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 256Mb SDRAM is organized as 4M x16x4 banks, 54-pin TSOPII and 54-ball BGA. The 256Mb SDRAM is a high speed CMOS, dynamic random-access memory designed to operate in 3.3V Vdd and 3.3V Vddq memory systems containing 268,435,456 bits. Internally configured as a quad-bank DRAM with a synchronous interface. Each 67,108,864-bit bank is organized as 8,192 rows by 512 columns by 16 bits or 8,192 rows by 1,024 columns by 8 bits. The 256Mb SDRAM includes an AUTO REFRESH MODE and a power-saving, power-down mode. All signals are registered on the positive edge of the clock signal, CLK. All inputs and outputs are LVTTL compatible.

• 143MHz Clock frequency
• 7ns Speed
• Fully synchronous, all signals referenced to a positive clock edge
• Internal bank for hiding row access/precharge
• 3.3 ±0.3V Single power supply
• LVTTL interface
• Programmable burst length - 1, 2, 4, 8, full page
• Sequential/Interleave programmable burst sequence
• Auto refresh (CBR)
• Self refresh
• 8K Refresh cycles every 16ms (A2 grade) or 64ms (commercial, industrial, A1 grade)
• Random column address every clock cycle
• Programmable CAS latency - 2, 3 clocks
• Burst read/write and burst read/single write operations capability
• Burst termination by burst stop and precharge command

Applications

Industrial, Commercial, Computers & Computer Peripherals